杉原 真／スギハラ マコト／Makoto Sugihara
| 所属 | 【学部】情報システム工学科 【大学院】情報工学専攻 融合システムコース |
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| 役職/職名 | 教授 | |
| 学位（授与機関） | 博士（工学）（九州大学） | |
| 担当科目 | 【学部】解析学I、確率?統計 【大学院】組込みハードウェア、組込みハードウェア特論 |
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| 略歴 |
学歴
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| 専門分野 | VLSIの設計自動化、組込みハードウェア及び応用 | |
業績紹介
受賞
- 情報処理学会創立40周年記念論文賞, 2000年10月.
- 安藤博記念学術奨励賞, 2008年5月.
- 船井情報科学奨励賞, 2009年4月.
- 組込みシステムシンポジウム優秀論文賞，2012年10月．
- 組込みシステムシンポジウム奨励賞, 2015年10月.
論文誌掲載論文
- M. Sugihara, H. Date, and H. Yasuura, “A test methodology for core-based system LSIs,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E81-A, No. 12, pp. 2640-2645, December 1998.
- 杉原真, 安浦寛人, “システムLSI時代における新テスト技術,” 情報処理学会論文誌, 第42巻3号, pp. 409-418, 2001年3月 （情報処理学会創立40周年記念論文賞受賞）.
- V. Iyengar, H. Date, M. Sugihara, and K. Chakrabarty, “Hierarchical intellectual property protection using partially-mergeable cores,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, No. 11, pp. 2632-2638, November 2001.
- M. Sugihara and H. Yasuura, “Optimization of test accesses with a combined BIST and external test scheme,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E84-A, No. 11, pp. 2731-2738, November 2001.
- M. Sugihara, K. Murakami, and Y. Matsunaga, “Test architecture optimization for system-on-a-chip under floorplanning constraints,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E87-A, No. 7, pp. 3174-3184, December 2004.
- M. Sugihara, T. Takata, K. Nakamura, R. Inanami, H. Hayashi, K. Kishimoto, T. Hasebe, Y. Kawano, Y. Matsunaga, K. Murakami, and K. Okumura, “Cell library development methodology for throughput enhancement of character projection equipment,” IEICE Transactions on Electronics, Vol. E89-C, No. 3, pp. 377-383, March 2006.
- M. Sugihara, K. Nakamura, Y. Matsunaga, and K. Murakami, “Technology mapping technique for increasing throughput of character projection lithography,” IEICE Transactions on Electronics, Vol. E90-C, No. 5, pp. 1012-1020, May 2007.
- 杉原真, 松永裕介, 村上和彰, “部分一括描画装置の処理能力の向上のための描画面積最適化,” 情報処理学会論文誌, 第48巻5号, 1888-1897, 2007年5月.
- M. Sugihara, T. Ishihara, and K. Murakami, “Architectural-level soft-error modeling for estimating reliability of computer systems,” IEICE Transactions on Electronics, E90-C, No. 10, pp. 1983-1991, October 2007.
- M. Sugihara, T. Ishihara, and K. Murakami, “Reliable cache architectures and task scheduling for multiprocessor systems,” IEICE Transactions on Electronics, Vol. E91-C, No. 4, pp. 410-417, April 2008.
- M. Sugihara, Y. Matsunaga, and K. Murakami, “Character projection mask set optimization for enhancing throughput of MCC projection systems,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E91-A, No. 12, December 2008.
- M. Sugihara, “Reliability inherent in heterogeneous multiprocessor systems and task scheduling for ameliorating their reliability,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E92-A, No.4, pp. 1121-1128, April 2009.
- M. Sugihara, “Character-size optimization for reducing the number of EB shots of MCC lithographic systems,” IEICE Transactions on Electronics, Vol. E93-C, No. 5, pp. 631-639, May 2010.
- M. Sugihara, “On synthesizing a reliable multiprocessor for embedded systems,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E93-A, No. 12, pp. 2560-2569, December 2010.
- M. Sugihara, “A dynamic continuous signature monitoring technique for reliable microprocessors, ” IEICE Transactions on Electronics, Vol. E94-C, No. 4, pp. 477-486, April 2011.
- M. Sugihara and A. Iwanaga, “Minimization of FlexRay bus bandwidth for hard real-time applications,” Journal of Information Processing, Vol. 21, No. 1, pp. 46-52, January 2013.
- M. Sugihara and A. Iwanaga, “Slot multiplexing optimization for minimizing the operating frequency of a FlexRay bus under hard real-time constraints,” Journal of Information Processing, Vol. 21, No. 3, pp. 563-571, July 2013.
- 岩永明人, 杉原真, 耐故障性の実現と通信帯域幅の最小化を両立するTDMAスケジューリング手法, 情報処理学会論文誌, 第54巻, 7号, pp. 1873-1882, 2013年7月.
- M. Sugihara, “Minimization of the fabrication cost for a bridged-bus-based TDMA system under hard real-time constraints,” IEICE Transactions on Information and Systems, Vol. E97-D, No. 12, pp. 3041-3051, December 2014.
- M. Sugihara, "Dynamic Slot Multiplexing Under Operating Modes for TDMA-Based Real-Time Networking Systems," Electronics, Vol. 9, No. 2, Jan. 2020.
国際会議論文
- M. Sugihara, H.